Many communications standards support employ multiple bands. One example is the Time Domain Synchronous Code Division Multiple Access (TD-SCDMA). TD-SCDMA typically employs three bands: A-Band (1880 MHz-1920 MHz); B-Band (2010 MHz-2025 MHz with up to 9 carriers); and C-Band (2300-2400 MHz, which is targeted for TD-LTE). As a result, base station transceivers (BTS), in order to be compliant with the applicable multi-band standard, need to support one or more of these bands, which is typically accomplished through the use of separate transmit chains for each band.
Turning to FIG. 1, a conventional system 100, which employs separate transmit/receive chains for each band, can be seen. System 100 generally comprises a transmit processor 102, a signal processor 104, transceiver pipelines 106-1 to 106-N, coupler 126, antenna 128, switch 130, mixer 132, and analog-to-digital converter (ADC) 134. Each of these transmit pipelines 106-1 to 106-2 respectively comprises digital-to-analog converters (DAC) 108-1 to 108-N and 110-1 to 110-N, a modulator 114-1 to 114-N, lower power amplifiers (LPA) 116-1 to 116-N and 124-1 to 124-N, a high power amplifier (HPA) 118-1 to 118-N, a coupler 120-1 to 120-N, a mixer 122-1 to 122-N, and an ADC 112-1 to 112-N. In operation, the baseband signal BB (which may be in any one of the supported bands) is converted to a radio frequency (RF) signal and transmitted through antenna 128, with each of the transceiver pipelines 106-1 to 106-N being configured to support one of the supported bands.
Clearly, it can be observed that this type of implementation uses a large number of components and uses a considerable amount of power, so it is desirable to reuse circuitry for multiple bands. The simple solution would be to simply combine all of the transmit pipelines 106-1 to 106-N into a signal pipeline, but there are some problems with reusing circuitry that lie with the digital predistortion (DPD) correction, which is provided by transmit processor 102. Typically, the transmit processor 102 (which may comprise multiple processors) receives feedback from each transmit pipeline 106-1 to 106-N and performs DPD correction for the nonlinearities of each of the HPAs 118-1 to 118-N separately.
Turning to FIG. 2, an example of a transmit processor 102 can be seen. Transmit processor 102 generally performs baseband processing with the digital upconverter (DUC) circuit 202 and crest factor reduction (CFR) circuit 204, resulting in a processed signal. This processed baseband signal is predistorted by the DPD circuit 206 to generate the output signal OUT. The DPD adaptive engine 208 can then receive feedback FB and adjust the DPD circuit 206. Typically, this type of DPD uses a rate that is five to seven times the bandwidth of a band, so, for example, with the combined A-Band and B-Band of TD-SCDMA, there is a total bandwidth 145 MHz (1880 MHz-2025 MHz), which indicates that the DPD circuit (i.e., 206) will generally operate between 725 MHz and 1050 MHz. This type of DPD bandwidth would, then, generally employ a feedback ADC (i.e., ADC 134) that operates at 1.45 GHz, which is prohibitively fast and which renders this simple solution infeasible. Moreover, this very wide bandwidth is prohibitive fast due the need for a significant amount of digital support hardware.
Therefore, there is a need for a transmit processor that is able to perform DPD corrections for multiple bands that reuses circuitry for each band.
Some other conventional circuits are: U.S. Pat. Nos. 7,170,344; 7,313,373; and 7,634,238.